RC time constant
The RC time constant, denoted τ (lowercase tau), the time constant of a resistor–capacitor circuit (RC circuit), is equal to the product of the circuit resistance and the circuit capacitance:

It is the time required to charge the capacitor, through the resistor, from an initial charge voltage of zero to approximately 63.2% of the value of an applied DC voltage, or to discharge the capacitor through the same resistor to approximately 36.8% of its initial charge voltage. These values are derived from the mathematical constant e, where and . When using the International System of Units, R is in ohms, C is in farads, and τ is in seconds.
Discharging a capacitor through a series resistor to zero volts from an initial voltage of V0 results in the capacitor having the following exponentially-decaying voltage curve:
Charging an uncharged capacitor through a series resistor to an applied constant input voltage V0 results in the capacitor having the following voltage curve over time:
which is a vertical mirror image of the charging curve.
Cutoff frequency
[edit]The time constant is related to the RC circuit's cutoff frequency fc, by
or, equivalently,
where resistance in ohms and capacitance in farads yields the time constant in seconds or the cutoff frequency in hertz (Hz). The cutoff frequency when expressed as an angular frequency is simply the reciprocal of the time constant.
Short conditional equations using the value for :
- fc in Hz = 159155 / τ in μs
- τ in μs = 159155 / fc in Hz
Other useful equations are:
- rise time (20% to 80%)
- rise time (10% to 90%)
In more complicated circuits consisting of more than one resistor and/or capacitor, the open-circuit time constant method provides a way of approximating the cutoff frequency by computing a sum of several RC time constants.
Calculator
[edit]For instance, 1 of resistance with 1 of capacitance produces a time constant of 1 (rounded to 3 decimal places). If the capacitor has an initial voltage of 1 , then after 1 (approximately 1 τ or 1.443 t½), the capacitor's voltage will drop to 0.368 (rounded). This τ corresponds to a cutoff frequency of approximately 0.159 or 1 .
Delay
[edit]The signal delay of a wire or other circuit, measured as group delay or phase delay or the effective propagation delay of a digital transition, may be dominated by resistive-capacitive effects, depending on the distance and other parameters, or may alternatively be dominated by inductive, wave, and speed of light effects in other realms.
Resistive-capacitive delay (RC delay) hinders microelectronic integrated circuit (IC) speed improvements. As semiconductor feature size becomes smaller and smaller to increase the clock rate, the RC delay plays an increasingly important role. This delay can be reduced by replacing the aluminum conducting wire by copper to reduce resistance or by changing the interlayer dielectric (typically silicon dioxide) to low-dielectric-constant materials to reduce capacitance.
The typical digital propagation delay of a resistive wire is about half of R times C; since both R and C are proportional to wire length, the delay scales as the square of wire length. Charge spreads by diffusion in such a wire, as explained by Lord Kelvin in the mid-nineteenth century.[1] Until Heaviside discovered that Maxwell's equations imply wave propagation when sufficient inductance is in the circuit, this square diffusion relationship was thought to provide a fundamental limit to the improvement of long-distance telegraph cables. That old analysis was superseded in the telegraph domain, but remains relevant for long on-chip interconnects.[2][3][4]
See also
[edit]- Cutoff frequency and frequency response
- Emphasis, preemphasis, deemphasis
- Exponential decay
- Filter (signal processing) and transfer function
- High-pass filter, low-pass filter, band-pass filter
- RL circuit, and RLC circuit
- Rise time
References
[edit]- ^ Andrew Gray (1908). Lord Kelvin. Dent. p. 265.
- ^ Ido Yavetz (1995). From Obscurity to Enigma. Birkhäuser. ISBN 3-7643-5180-2.
- ^ Jari Nurmi; Hannu Tenhunen; Jouni Isoaho & Axel Jantsch (2004). Interconnect-centric Design for Advanced SoC and NoC. Springer. ISBN 1-4020-7835-8.
- ^ Scott Hamilton (2007). An Analog Electronics Companion. Cambridge University Press. ISBN 978-0-521-68780-5.